Energy-efficient Dynamic Circuit Design in the Presence of Crosstalk Noise - Low Power Electronics and Design, 1999. Proceedings. 1999 International Symposium on

This paper describes the impact of crosstalk noise on low power design techniques based on voltage scaling. I t is shown that this power saving strategy aggmvates the crosstalk noise problem and reduces circuit noise immunity. A new energy-eficient, noise-tolerant dynamic circuit technique is presented to address this problem. In a 0.35pm CMOS technology and at a given supply voltage, the proposed technique provides an improvement i n noiseimmunity of 1.8X(for an AND gate) and 2.5X(for an adder c a w chain) over domino at the same speed. W e use this fact to operate the noise-tolerant circuit at a lower supply voltage to obtain energy savings of about 30%, while ezpending 30% more area. Also, to achieve a given noise immunity, the proposed technique consumes 40% less energy compared to existing noise-tolerance techniques.